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| CXP82200 CMOS 8-bit Single Chip Microcomputer Description The CXP82200 is a CMOS 8-bit single chip microcomputer of piggyback/evaluator combined type, which is developed for evaluating the function of the CXP82220/82224. Piggyback/ evaluator type 100 pin PQFP (Ceramic) Features * Wide-range instruction system (213 instructions) to cover various types of data -- 16-bit operation/multiplication and division/ Boolean bit operation instructions * Minimum instruction cycle 400ns at 10MHz operation 122s at 32kHz operation * Applicable EPROM LCC type 27C128, LCC type 27C256 (Maximum 24K bytes are available.) * Incorporated RAM capacity 704 bytes (Including fluorescent display data area) * Peripheral functions -- A/D converter 8-bit, 8-channel, successive approximation method (Conversion time of 32s/10MHz) -- Serial interface Incorporated 8-bit, 8-stage FIFO (Auto transfer for 1 to 8 bytes), 1 channel 8-bit clock sync type, 1 channel -- Timer 8-bit timer 8-bit timer/counter 19-bit time base timer 16-bit capture timer/counter 32kHz timer/counter -- Fluorescent display panel controller/driver Maximum 384 segment display possible 1 to 16-digit dynamic display Dimmer function High voltage drive output (40V) On-chip pull-down resistor (Mask option) Hardware key scan function (Maximum 16 x 8 key matrix compatible) -- Remote control reception circuit 8-bit pulse measurement counter with on-chip 6-stage FIFO -- PWM output 14 bits, 1 channel -- CTL duty detection circuit -- High-speed output circuit Four RTG outputs * Interruption 19 factors, 15 vectors, multi-interruption possible * Standby mode Sleep/stop * Package 100-pin ceramic QFP Note) Mask option depends on the type of the CXP82200. Refer to the Products List for details. Structure Silicon gate CMOS IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. -1- E93847A78-PS CXP82200 Pin Assignment in Piggyback Mode PE0/EC0/INT0 PG3/RTO3 PG2/RTO2 PG1/RTO1 PG0/RTO0 PG7 PG6 PG5 PG4 Vss VFDP NC VDD 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 PE1/EC1/INT1 PE2/INT2 PE3/INT3/NMI PE4/RMC PE5/CTL PE6/PWM PE7/T0/DD0/ADJ PB0/CINT PB1/CS0 PB2/SCK0 PB3/SI0 PB4/SO0 PB5/SCK1 PB6/SI1 PB7/SO1 PC0/KR0 PC1/KR1 PC2/KR2 PC3/KR3 PC4/KR4 PC5/KR5 PC6/KR6 PC7/KR7 PH0 PH1 PH2 PH3 PH4 PH5 PH6 1 2 3 4 5 6 7 80 79 78 77 76 75 74 T7 T8/S31 T9/S30 T10/S29 T11/S28 T12/S27 T13/S26 T14/S25 T15/S24 PI7/S23 PI6/S22 PI5/S21 PI4/S20 PI3/S19 PI2/S18 PI1/S17 PI0/S16 PF7/S15 PF6/S14 PF5/S13 PF4/S12 PF3/S11 PF2/S10 PF1/S9 PF0/S8 PD7/S7 PD6/S6 PD5/S5 PD4/S4 PD3/S3 A12 A15 NC 9 10 11 12 13 14 15 16 17 18 19 20 21 4 A6 A5 A4 A3 A2 A1 A0 NC D0 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 3 2 1 32 31 30 29 28 27 26 25 24 23 22 21 A8 A9 A11 NC OE A10 CE D7 D6 A7 8 VDD A14 A13 T0 T1 T2 T3 T4 T5 T6 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 GND NC D1 D2 D3 D4 D5 22 PA7/AN7 Note) 1. NC (Pin 90) is always connected to VDD. 2. Vss (Pins 41 and 91) are both connected to GND. -2- PA0/AN0 PA1/AN1 PA2/AN2 PA3/AN3 PA4/AN4 PA5/AN5 PA6/AN6 PD0/S0 PD1/S1 PD2/S2 EXTAL AVREF XTAL RST PH7 TEX Vss Vss TX CXP82200 Pin Assignment in Evaluator Mode PE0/EC0/INT0 PG3/RTO3 PG2/RTO2 PG1/RTO1 PG0/RTO0 PG7 PG6 PG5 PG4 Vss VFDP NC VDD 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 PE1/EC1/INT1 PE2/INT2 PE3/INT3/NMI PE4/RMC PE5/CTL PE6/PWM PE7/T0/DD0/ADJ PB0/CINT PB1/CS0 PB2/SCK0 PB3/SI0 PB4/SO0 PB5/SCK1 PB6/SI1 PB7/SO1 PC0/KR0 PC1/KR1 PC2/KR2 PC3/KR3 PC4/KR4 PC5/KR5 PC6/KR6 PC7/KR7 PH0 PH1 PH2 PH3 PH4 PH5 PH6 1 2 3 4 5 6 80 79 78 77 76 75 T7 T8/S31 T9/S30 T10/S29 T11/S28 T12/S27 T13/S26 T14/S25 T15/S24 PI7/S23 PI6/S22 PI5/S21 PI4/S20 PI3/S19 PI2/S18 PI1/S17 PI0/S16 PF7/S15 PF6/S14 PF5/S13 PF4/S12 PF3/S11 PF2/S10 PF1/S9 PF0/S8 PD7/S7 PD6/S6 PD5/S5 PD4/S4 PD3/S3 A7/D7 7 8 9 10 T0 T1 T2 T3 T4 T5 T6 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 A12 A15 4 11 12 13 14 15 16 17 18 19 20 21 A6/D6 A5/D5 A4/D4 A3/D3 A2/D2 A1/D1 A0/D0 NC RD 5 6 7 8 9 10 11 12 13 3 2 NC 1 32 31 30 29 28 27 26 25 24 23 22 21 A8 A9 A11 NC HALT A10 E/P I/T MON 14 15 16 17 18 19 20 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 SYNC GND RST WR NC C2 C1 22 VDD A14 A13 PA7/AN7 Note) 1. NC (Pin 90) is always connected to VDD. 2. Vss (Pins 41 and 91) are both connected to GND. -3- PA0/AN0 PA1/AN1 PA2/AN2 PA3/AN3 PA4/AN4 PA5/AN5 PA6/AN6 PD0/S0 PD1/S1 PD2/S2 EXTAL AVREF XTAL RST PH7 TEX Vss Vss TX CXP82200 EPROM Read Timing (Ta = -20 to +75C, Vcc = 4.5 to 5.5V, Vss = 0V reference) Item Address Data Input delay time Address Data Hold time Symbol Pins A0 to A15 D0 to D7 A0 to A15 D0 to D7 0 Min. Max. 120 Unit ns ns tACC tIH 0.8VDD A0 to A15 Address data 0.2VDD tACC tIH 0.8VDD Input data 0.2VDD D0 to D7 Products List Products Option item Mask CXP82220 Package ROM capacitance Pull-up resistance for reset pin Power-on reset circuit Pull-down resistance for high voltage drive pin CXP82224 Piggyback/evaluator CXP82200-U01Q 100-pin ceramic PQFP EPROM 24K bytes Existent Non-existent Only port for display 100-pin plastic QFP 20K bytes 24K bytes Existent/Non-existent Non-existent Existent/Non-existent -4- CXP82200 Piggyback mode/evaluator mode can be switched as shown below. Piggyback mode Piggyback/evaluator product Evaluator mode Pin 1 marking LCC type EPROM Pin 1 marking Pin 1 index Note) CPU Probe Note) Evaluation cap should be connected to CPU probe. -5- Package Outline 100PIN PQFP (CERAMIC) 18.7 16.3 0.2 81 81 PIN No. 1 INDEX 100 Unit: mm PIN NO. 1 INDEX INDEX 100 1 80 80 1 6.0 24.7 1.27 0.13 12.02 14.22 22.3 0.25 18.12 0.2 0.3 1.0 0.7 30 51 51 30 31 9.48 11.66 15.58 0.2 1.3 0.3 50 50 0.45 31 PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE PQFP-100C-L01 AQFP100-C-0000-A LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT CERAMIC GOLD PLATING 42 ALLOY 5.7g 3.57 0.36 + 0.05 0.15 - 0.02 0.50 0.25 10.44 MAX 0.3 0.08 0.65 0.05 4.5 -6- CXP82200 |
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